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Dr. Nam received the B.S. and M.S. degrees from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 2006 and 2008, respectively, and the Ph.D. degree in electrical engineering with the University of Southern California (USC), Los Angeles, CA, USA, in 2019. From 2008 to 2012, he was with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, as a full-time Researcher. Since Fall 2017, he has been a Graduate Intern with the Data Center Group, Intel Corporation, Santa Clara, CA, USA, worked on the next generation high-speed I/O architectures. From July 2019 to July 2020, he was an Analog Engineer at Intel Corporation Ltd., I/O Circuit Technology Team. He is currently an Assistant Professor with the Department of Electronic and Information Engineering, Seoul National University of Science and Technology (SeoulTech). His research interests include designing low-power high-speed high-resolution analog-to-digital data converters and high-speed I/O interface circuits.




Mixed-signal Integrated Circuit Design

University of Southern California, CA, US

M.S. in Electrical and Computer Engineering

Ph.D. in EE-Electrophysics (2019)

Thesis: Energy-Efficient Design Techniques and Architectures for High-speed (GS/s) Analog-to-Digital Converters

  • Low-power / High-resolution ADC for RF-sampling

  • High-speed ADC-based Wireline SerDes

  • Digitally assisted AFE circuit design

  • Data converter-based systems

  • Hardware Security

  • mmWave Transceiver

  • Ultra wide-band Contactless I/O

  • Sensor-interface ROIC (image/audio/display/motor)

  • Design Automation leveraging Machine Learning

  • USC Viterbi School of Engineering Ph.D. Fellowship

  • President Award, KAIST (2006)

  • President Award, ETRI (2009)​

  • IEEE CICC 2019 Best Student Paper Award

KAIST, South Korea (former ICU)

B.S. (2006) and M.S. (2008)

in Electrical Communication Engineering

Thesis: Systematic power optimizing cyclic ADC design

ETRI, Daejeon, South Korea

   Graduate Intern (2006.Oct. - 2007.Oct)

   Research Staff (2008.Feb. - 2012.June)

Intel corporation (DCG), Santa Clara CA, US

   Graduate Intern (2017. Oct - 2017. Dec)

Intel corporation LTD AD, Hillsboro OR, US

   Analog Engineer (2019. Sept - 2020. July)




Openings @ AD-Lab

Research position opportunities

  • Post-doc (1 year or more)

  • B.S./M.S. combined student

  • M.S. graduate student

  • Ph.D. graduate student

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